This invention relates generally to computer systems and more particularly to devices used to drive signals onto and receive signals from a computer bus.
As it is known in the art, computer systems generally include a device referred to as a central processor unit which is used to execute computer instructions to perform some function. The central processing unit generally referred to as a CPU communicates with other devices in the computer system via a communications network referred to as a computer bus or system bus. Other devices commonly connected to the computer bus include memory systems such as main memory and more persistent type of storage systems such as magnetic disk type storage systems. These devices are generally not connected directly to the system bus but rather are connected to the bus through a device called a bus interface.
The bus interface device for a CPU may be quite different than that for a main memory or for a magnetic disk device, Moreover, for persistent storage such as magnetic disk, an interface module called a I/O bus adapter is often used to interface the system bus to an I/O bus (input/output bus) to which are connected several disk storage devices. In general, all of these interfaces on a particular bus generally use a common set of devices called bus drivers and bus receivers to provide and receive logic signals with the proper voltage levels and the appropriate drive capacity to insure reliable transfers on the bus.
As it is also known, system buses generally carry information including address information, control information, and data. Busses transfer this information in a logical manner as determined by the design of the system. This logical manner is referred to as the bus protocol.
One problem that is common with system buses is that as the performance of a CPU increases that is, as the processing speed and power increases, it is necessary to provide a concomitant increase in bus bandwidth. That is it is necessary to permit more address, control, and data to be transferred at faster rates so as not to obviate the advantages obtained by ever faster CPU's.
Several problems are associated with improving bus performance. A concept called cycle time gives an indication of the speed of a bus. A cycle can be viewed as that period of time required to complete a transfer on the bus before a new transfer can begin. In general, minimum cycle time is related to noise in the clock generally referred to as clock skew, propagation delay from an asserting edge of the clock to the period of time that the data appears at the output of the device connected to the bus, and delay associated with driving the bus. The delay associated with driving the bus includes two components. The first one is the propagation delay through the bus driver and the second is the period of time necessary to have the bus settle.
This latter one is related to the amount of time necessary to have voltage on the bus settle to the appropriate value. When the bus changes state, the settling time is generally greatest.